I was born in Inner Mongolia, China. I received the B.Sc. degree in electronic science and technology from Shanghai University of Electric Power in 2017 and the M.Sc. degree in integrated circuit engineering from Shanghai Jiao Tong University in 2021. I am currently pursuing the Ph.D. degree in electronic science and technology with Tsinghua University. My research interest includes AI hardware accelerator and side-channel security.

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🔥 News

• 2025.12:  🎉 I attended the AsianHOST 2025 PhD Forum organized by IEEE CEDA and presented both an oral and a poster presentation.

• 2025.08:  🎉 One poster on extracting neural network model outputs using the independently developed CrackNuts board has been accepted for presentation at CHES 2025. See you in Kuala Lumpur!

• 2025.08:  🎉 Our paper on a self-attention hardware accelerator was accepted by ASICON 2025.

• 2025.08:  📢 Start new semester.

• 2025.07:  🎉 Our papers on NN and Transformer hardware implementations and SCA analysis were accepted by ICICM 2025.

• 2025.06:  🎉 Our research project focusing on SCAs against edge hardware for large AI models has been successfully approved!

• 2025.05:  🎉 I passed the doctoral qualifying examination and officially became a PhD candidate!!!

• 2025.03:  🎉 One paper on attacking the DNN systolic array via side-channel star map has been published on IEEE TCAD!

• 2025.02:  🎉 One paper on attacking the DNN accelerator via 3D power surface has been accepted by HOST 2025! See you in San Jose!

• 2025.02:  📢 Start new semester.

• 2024.11:  🎉 I have been awarded the First-Class Comprehensive Scholarship of Tsinghua University.

• 2024.03:  🧑‍🏫 Teaching assistant of the Analog Electronic Technology.

📝 Publications

2025

• ⭐️ [C] IACR CHES Le Wu, Liji Wu, Xiangmin Zhang, Yuyang Pan, and Jian Wu, “Cracking the AI Nut: From Output Extraction to Shuffling Countermeasure,” poster presentation, in 2025 IACR Cryptographic Hardware and Embedded Systems (CHES 2025).

• ⭐️ [J] IEEE TCAD Le Wu, Liji Wu, Xiangmin Zhang, “Catch the Star: Weight Recovery Attack using Side-Channel Star Map against DNN Accelerator,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD), vol. 44, no. 10, pp. 3697-3709, Oct. 2025, doi: 10.1109/TCAD.2025.3551652.

• ⭐️ [C] IEEE HOST Le Wu, Liji Wu, Zhiwei Ba, Xiangmin Zhang, “An Input Recovery Side-Channel Attack on DNN Accelerator with Three-Dimensional Power Surface,” in 2025 IEEE International Symposium on Hardware Oriented Security and Trust (HOST 2025), San Jose, CA, USA, 2025, pp. 1-11, doi: 10.1109/HOST64725.2025.11050042.

• [C] IEEE ASICON Zhenkun Li, Liji Wu, Yi Yang, Tianling Ren, Le Wu, and Xiangmin Zhang, “A 16×16 High-Utilization Systolic Array Hardware Accelerator for Long-Sequence Flash-Attention Computation in Transformer” in 2025 IEEE 16th International Conference on ASIC (ASICON 2025).

• [C] IEEE ICICM Runquan Shao, Liji Wu, Jing Hu, Le Wu, and Xiangmin Zhang, “Hardware Design and Side-Channel Security Analysis on the Key Computational Block for YOLOv11,” in 2025 10th International Conference on Integrated Circuits and Microsystems (ICICM 2025).

• [C] IEEE ICICM Wentao Wang, Liji Wu, Jing Hu, Le Wu, and Xiangmin Zhang, “Hardware Implementation and Side-Channel Security Analysis for High-Precision AI Transformer Encoder,” in 2025 10th International Conference on Integrated Circuits and Microsystems (ICICM 2025).

• [C] Elsevier SMC-IoT Yi Wu, Yuyang Pan, Jie Wang, Lihong Nai, Le Wu, “Modeling and Application of High-Stability, High-Performance Multi-Data Transceiver Mechanisms: A Case Study on Optimizing Signal Acquisition System Performance for Hardware Security,” in the 4th International Conference on Sensing, Measurement, Communication and Internet of Things Technologies (SMC-IoT 2025)

2024

• ⭐️ [J] IEEE TVLSI Le Wu, Liji Wu, Xiangmin Zhang, Munkhbaatar Chinbat, “Dual-Rail Precharge Logic-Based Side-Channel Countermeasure for DNN Systolic Array,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume: 32, Issue: 9, September 2024, doi: 10.1109/TVLSI.2024.3387986.

• [C] IEEE ICICM Zhiwei Ba, Liji Wu, Jing Hu, Le Wu, Xiangmin Zhang, “Multi-Head Attention Hardware Implementation and Side-Channel Security Analysis for Transformer,” in 2024 9th International Conference on Integrated Circuits and Microsystems (ICICM 2024), doi: 10.1109/ICICM63644.2024.10814141.

2023

• [C] IEEE ASID Yan Liu, Liji Wu, Zhenhui Zhang, Xiangmin Zhang, Jing Zhou, Yifan Yang, Le Wu, Hardware Design of PQC Classic McEliece Finite Field Operations and Encryption Module in IEEE 17th International Conference on Anti-counterfeiting, Security, and Identification (ASID 2023), 2023, pp. 67-71, doi: 10.1109/ASID60355.2023.10426507.

• [C] IEEE ASID Munkhbaatar Chinbat, Liji Wu, Xiangmin Zhang, Altantsooj Batsukh, Yifan Yang, Le Wu, Evaluating Side-Channel Attack Vulnerabilities in Post-Quantum CRYSTALS-Kyber Hardware Based on Simple Power Analysis in IEEE 17th International Conference on Anti-counterfeiting, Security, and Identification (ASID 2023), 2023, pp. 46-49, doi: 10.1109/ASID60355.2023.10426450.

2021

• ⭐️ [J] Microelectronics & Computer Le Wu， Wu Liu， Liang Hong，“Investigation on disturbance characteristics and test algorithm of SONOS embedded flash memory,” Microelectronics & Computer, 2021, 38(05), doi: 10.19304/j.cnki.issn1000-7180.2021.05.002. (In Chinese)

🎖 Honors and Awards

• 2025 Research Excellence Scholarship, School of Integrated Circuits, Tsinghua University.
• 2024 First-Class Comprehensive Scholarship of Tsinghua University.

📖 Educations

• 2022.09 - now, the Ph.D. degree, electronic science and technology, Tsinghua University (THU), Beijing, China.
• 2018.09 - 2021.07, the M.Sc. degree, integrated circuit engineering, Shanghai Jiao Tong University (SJTU), Shanghai, China.
• 2013.09 - 2017.07, the B.Sc. degree, electronic science and technology, Shanghai University of Electric Power (SHIEP), Shanghai, China.

🛠️ Projects

• 2025.07 - now Research on AI-assisted side-channel attack technology for edge-side large model hardware, the Initiative Scientific Research Program, School of Integrated Circuits, Tsinghua University.
• 2022.09 - 2024.09 Research on AI Hardware Security and Side-Channel Attack Technology, the Initiative Scientific Research Program, School of Integrated Circuits, Tsinghua University.
• 2019.09 - 2021.03 RISC-V based SONOS Flash testchip, tape-out with HLMC 55nm.

💻 Internships

• 2025.11 - now Hardware Security Engineer, the Beijing Pairui Micro Technology Co.
• 2019.09 - 2021.03 Digital IC Design Engineer, Design Service Department (DS), Shanghai Huali Microelectronics Co.